Verilog-A Compact Model for a Novel Cu/SiO2/W Quantum Memristor

In this paper, we develop a Verilog-A model for a memristive device that has shown non-volatile state transitions via half-integer quantized conductance states at room temperature and an on-off ratio of similar to 10(3). The model captures the geometrical evolution of a nano-filament and maps it to conductance levels in the equivalent electrical circuit, thereby accurately capturing the DC I-V and transient response of the device. The suitability of the model for circuit simulations is illustrated via a 4 x 4 crossbar array programming simulation in HSPICE which captures the multilevel programmability of the device.