On Self-Timed Ring for Consistent Mapping and Maximum Throughput

被引:0
作者
Jiang, Weiwen [1 ]
Zhuge, Qingfeng [1 ,2 ]
Yi, Juan [1 ]
Yang, Lei [1 ]
Sha, Edwin H. M. [1 ,2 ]
机构
[1] Chongqing Univ, Coll Comp Sci, Chongqing 630044, Peoples R China
[2] Minist Educ, Key Lab Dependable Serv Comp Cyber Phys Soc, Chongqing, Peoples R China
来源
2014 IEEE 20TH INTERNATIONAL CONFERENCE ON EMBEDDED AND REAL-TIME COMPUTING SYSTEMS AND APPLICATIONS (RTCSA) | 2014年
关键词
Self-Timed Ring; Consistent Mapping; Throughput;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Multiprocessor System-on-Chip employing self-timed technique becomes increasingly attractive due to its ability for exploiting high parallelism of applications. There have been many research efforts on studying self-timed techniques on hardware layer. However, these research results are unable to be applied to system synthesis; in particular, how to correctly and optimally map an application represented by a Data Flow Graph to a self-timed ring architecture remains unknown. Self-timed ring (STR) is a popular and easy to implemented architecture. This paper establishes a series of theorems about the setting of initial configuration to achieve correct mappings and the formulas of calculating corresponding throughputs of STR. Based on the understanding, we can obtain a correct initial configuration of STR. And an algorithm presented in the paper can also find the best initial configuration that achieves the maximum throughput of STR. Examples show maximum throughput algorithm achieves 51.11% improvement of throughput compared with non-optimized ones.
引用
收藏
页数:9
相关论文
共 23 条
  • [1] [Anonymous], 2003, ACM T EMBED COMPUT S, DOI DOI 10.1145/950162.950168
  • [2] Scheduling data-flow graphs via retiming and unfolding
    Chao, LF
    Sha, EHM
    [J]. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 1997, 8 (12) : 1259 - 1267
  • [3] Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory
    Du, Jiayi
    Wang, Yan
    Zhuge, Qingfeng
    Hu, Jingtong
    Sha, Edwin H. -M.
    [J]. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2013, 71 (03): : 261 - 273
  • [4] Gill G., 2006, Proc. Int. Conf. Computer-Aided Design (ICCAD), P289
  • [5] Greenstreet M. R., 1990, Journal of VLSI Signal Processing, V2, P139, DOI 10.1007/BF00935211
  • [6] Greenstreet M. R., 1993, GAX9311221 UMI
  • [7] Gu SZ, 2013, INT CONF ACOUST SPEE, P2615, DOI 10.1109/ICASSP.2013.6638129
  • [8] Write Activity Reduction on Non-Volatile Main Memories for Embedded Chip Multiprocessors
    Hu, Jingtong
    Xue, Chun Jason
    Zhuge, Qingfeng
    Tseng, Wei-Che
    Sha, Edwin H. -M.
    [J]. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2013, 12 (03)
  • [9] Kai-ming Yang, 2010, 2010 International Computer Symposium (ICS 2010), P682, DOI 10.1109/COMPSYM.2010.5685427
  • [10] Self-timed ring architecture for SOC applications
    Liljeberg, P
    Plosila, J
    Isoaho, J
    [J]. IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2003, : 359 - 362