Systematic Generation of Diverse Benchmarks for DNN Verification

被引:3
作者
Xu, Dong [1 ]
Shriver, David [1 ]
Dwyer, Matthew B. [1 ]
Elbaum, Sebastian [1 ]
机构
[1] Univ Virginia, Charlottesville, VA 22904 USA
来源
COMPUTER AIDED VERIFICATION (CAV 2020), PT I | 2020年 / 12224卷
基金
美国国家科学基金会;
关键词
Neural network; Verification; Benchmark; Covering array; FORMAL VERIFICATION; TEST SUITES;
D O I
10.1007/978-3-030-53288-8_5
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The field of verification has advanced due to the interplay of theoretical development and empirical evaluation. Benchmarks play an important role in this by supporting the assessment of the state-of-the-art and comparison of alternative verification approaches. Recent years have witnessed significant developments in the verification of deep neural networks, but diverse benchmarks representing the range of verification problems in this domain do not yet exist. This paper describes a neural network verification benchmark generator, GDVB, that systematically varies aspects of problems in the benchmark that influence verifier performance. Through a series of studies, we illustrate how GDVB can assist in advancing the sub-field of neural network verification by more efficiently providing richer and less biased sets of verification problems.
引用
收藏
页码:97 / 121
页数:25
相关论文
共 50 条
[31]   SYSTEMATIC TESTING AND FORMAL VERIFICATION TO VALIDATE REACTIVE PROGRAMS [J].
MULLERBURG, M ;
HOLENDERSKI, L ;
MAFFEIS, O ;
MERCERON, A ;
MORLEY, M .
SOFTWARE QUALITY JOURNAL, 1995, 4 (04) :287-307
[32]   A robust DNN model for text-independent speaker identification using non-speaker embeddings in diverse data conditions [J].
Shome, Nirupam ;
Saritha, Banala ;
Kashyap, Richik ;
Laskar, Rabul Hussain .
NEURAL COMPUTING & APPLICATIONS, 2023, 35 (26) :18933-18947
[33]   An experiment in automatic generation of test suites for protocols with verification technology [J].
Fernandez, JC ;
Jard, C ;
Jeron, T ;
Viho, C .
SCIENCE OF COMPUTER PROGRAMMING, 1997, 29 (1-2) :123-146
[34]   Efficient Test Bitstream Generation Method for Verification of HEVC Decoders [J].
Hong, Dosun ;
Chae, Soo-Ik .
18TH IEEE INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE 2014), 2014,
[35]   Reconfigurable Scan Networks: Modeling, Verification, and Optimal Pattern Generation [J].
Baranowski, Rafal ;
Kochte, Michael A. ;
Wunderlich, Hans-Joachim .
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2015, 20 (02)
[36]   Graph based test case generation for TLM functional verification [J].
Kakoee, Mohammad Reza ;
Neishaburi, M. H. ;
Mohammadi, Siamak .
MICROPROCESSORS AND MICROSYSTEMS, 2008, 32 (5-6) :288-295
[37]   Test sequence generation for controller verification and test with high coverage [J].
Goren, Sezer ;
Ferguson, F. Joel .
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2006, 11 (04) :916-938
[38]   Automatic Inductive Invariant Generation for Scalable Dataflow Circuit Verification [J].
Xu, Jiahui ;
Josipovic, Lana .
2023 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, ICCAD, 2023,
[39]   MIST: monitor generation from informal specifications for firmware verification [J].
Germiniani, Samuele ;
Bragaglio, Moreno ;
Pravadelli, Graziano .
2020 IFIP/IEEE 28TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2020, :111-116
[40]   Formal verification of static software models in MDE: A systematic review [J].
Gonzalez, Carlos A. ;
Cabot, Jordi .
INFORMATION AND SOFTWARE TECHNOLOGY, 2014, 56 (08) :821-838