SubByte for the AES Using Combinational Logic

被引：0

作者：

Zhu, Minling ^{[1
]}

Wang, Xi ^{[1
]}

Rao, Jinghong ^{[2
]}

He, Ai ^{[2
]}

机构：

[1] Beihang Univ, Sch Jet Prop, Beijing 100191, Peoples R China

[2] Beihang Univ, China Aerosp Sci & Ind Corp, Beijing 100854, Peoples R China

来源：

2011 INTERNATIONAL CONFERENCE ON ELECTRONICS, COMMUNICATIONS AND CONTROL (ICECC) | 2011年

关键词：

SubBytes; AES; combinational logic; Galois Field;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a hardware implementation method for the SubBytes and InvSubBytes transformations of the AES in view of foregoing look- up tables (LUT) having unbreakable delay. In addition, the transformations would be exceeding complex in hardware if affine transformation in Galois Field GF(2(8)) is employed. It will lead to slow computing speed and high cost of source. Hence decomposing method based on combinational logic will be an effective way. Moreover, the decomposing method helps with the combined structure where the SubBytes and the InvSubBytes can share same transformation module. Firstly, the GF(2(8)) element can be decomposed into GF(2(4)) elements. Furthermore, in GF(2(4)), we analyze composite field arithmetic and counterpart isomorphic mapping.

引用

页码：1064 / 1067

页数：4