The design of reliable devices for mission-critical applications

被引:3
作者
Bolchini, C [1 ]
Pomante, L
Salice, F
Sciuto, D
机构
[1] Politecn Milan, Dipartimento Elettron & Informat, I-20133 Milan, Italy
[2] CEFRIEL, Milan, Italy
关键词
digital design of reliable systems; fault observability; hardware faults; totally self-checking (TSC); TSC quality;
D O I
10.1109/TIM.2003.818736
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Mission-critical applications require that any failure that may lead to erroneous behavior and computation is detected and signaled as soon as possible in order not to jeopardize the entire system. Totally self-checking (TSC) systems are designed to be able to autonomously detect faults when they occur during normal circuit operation. Based on the adopted TSC design strategy and the goal pursued during circuit realization (e.g., area minimization), the circuit, although TSC, may not promptly detect the fault depending on the actual number of input configurations that serve as test vectors for each fault in the network. If such a number is limited, although TSC it may be improbable that the fault is detected once it occurs, causing detection and aliasing problems. The paper presents a design methodology, based on a circuit re-design approach and an evaluation function, for improving a TSC circuit promptness in detecting faults' occurrence, a property we will refer to as TSC quality.
引用
收藏
页码:1703 / 1712
页数:10
相关论文
共 15 条
  • [1] [Anonymous], 1986, FAULT TOLERANT COMPU
  • [2] Fault analysis for networks with concurrent error detection
    Bolchini, C
    Salice, F
    Sciuto, D
    [J]. IEEE DESIGN & TEST OF COMPUTERS, 1998, 15 (04): : 66 - 74
  • [3] Bolchini C, 1997, SECOND ANNUAL IEEE INTERNATIONAL CONFERENCE ON INNOVATIVE SYSTEMS IN SILICON, 1997 PROCEEDINGS, P196, DOI 10.1109/ICISS.1997.630260
  • [4] Bolchini C, 1997, ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV, P2741, DOI 10.1109/ISCAS.1997.612892
  • [5] MULTILEVEL LOGIC SYNTHESIS
    BRAYTON, RK
    HACHTEL, GD
    SANGIOVANNIVINCENTELLI, AL
    [J]. PROCEEDINGS OF THE IEEE, 1990, 78 (02) : 264 - 300
  • [6] DE K, 1994, IEEE T VLSI SYST, V2, P189
  • [7] On the design of self-checking functional units based on Shannon circuits
    Favalli, M
    Metra, C
    [J]. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS, 1999, : 368 - 375
  • [8] KAKAROUNTAS AP, 2002, P IEEE S CIRC SYSTEM, V4, P313
  • [9] Lo J.-C., 1993, Proceedings. The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Cat. No.93TH0571-0), P263, DOI 10.1109/DFTVS.1993.595821
  • [10] Probability to achieve TSC goal
    Lo, JC
    Fujiwara, E
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1996, 45 (04) : 450 - 460