Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs

被引:0
作者
Wang, Sheng-Chun [1 ,2 ]
Su, Pin [2 ,3 ]
Chen, Kun-Ming [1 ]
Liao, Kuo-Hsiang [1 ]
Chen, Bo-Yuan [1 ]
Huang, Sheng-Yi [4 ]
Hung, Cheng-Chou [4 ]
Huang, Guo-Wei [1 ,2 ]
机构
[1] Natl Nano Device Lab, Hsinchu 300, Taiwan
[2] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
[3] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan
[4] United Microelect Corp UMC, Hsinchu 300, Taiwan
关键词
Body resistance; dynamic threshold voltage (DT) MOSFETs; noise; RF; silicon-on-insulator (SOI); small signal; temperature dependence; DTMOS; MODEL;
D O I
10.1109/TMTT.2010.2057175
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, temperature-dependent RF small-signal and noise characteristics of silicon-on-insulator (SOI) dynamic threshold voltage (DT) MOSFETs are experimentally examined. In the low-voltage regime, both the cutoff and maximum oscillation frequencies (f(t) and f(max)) tend to increase with temperature. In addition, the inherent body-related parasitics and the series resistance have much more impact on f(max) than f(t). Besides, we found that the noise stemmed from the body resistance (R-b) would contribute to the output noise current, and degrade the minimum noise figure (NFmin). Our study may provide insights for RF circuit design using advanced SOI DT MOSFETs.
引用
收藏
页码:2319 / 2325
页数:7
相关论文
共 16 条
[1]   Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI [J].
Assaderaghi, F ;
Sinitsky, D ;
Parke, SA ;
Bokor, J ;
Ko, PK ;
Hu, CM .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (03) :414-422
[2]  
Chang CY, 2001, 2001 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P89, DOI 10.1109/VLSIT.2001.934961
[3]  
HIROSE T, 2001, INT EL DEV M
[4]   Compact threshold-voltage model for short-channel partially-depleted (PD) SOI dynamic-threshold MOS (DTMOS) devices [J].
Kuo, JB ;
Yuan, KH ;
Lin, SC .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (01) :190-196
[5]   Temperature dependence of DTMOS transistor characteristics [J].
Lee, NJ ;
Choi, NJ ;
Yu, CG ;
Colinge, JP ;
Park, JT .
SOLID-STATE ELECTRONICS, 2004, 48 (01) :183-187
[6]   A 140 GHz ft and 60 GHz fmax DTMOS integrated with high-performance SOI logic technology [J].
Momiyama, Y ;
Hirose, T ;
Kurata, H ;
Goto, K ;
Watanabe, Y ;
Sugii, T .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :451-454
[7]   Investigation of high temperature effects on MOSFET transconductance (gm) [J].
Osman, AA ;
Osman, MA .
1998 FOURTH INTERNATIONAL HIGH TEMPERATURE ELECTRONICS CONFERENCE, 1998, :301-304
[8]   Experimentally-based analytical model of deep-submicron LDD pMOSFET's in a Bi-MOS hybrid-mode environment [J].
Rofail, SS ;
Yeo, KS .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (09) :1473-1482
[9]  
Shibata A., 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216), P76, DOI 10.1109/VLSIT.1998.689206
[10]  
To KH, 2003, IEEE RAD FREQ INTEGR, P163, DOI 10.1109/RFIC.2003.1213917