Quantitative Analysis of Asymmetric Multilevel Inverters With Reduced Device Count From Reliability and Cost Function Perspective-A Review

被引:32
作者
Krishnachaitanya, Daki [1 ]
Chitra, A. [1 ]
机构
[1] Vellore Inst Technol, Sch Elect Engn, Vellore 632014, Tamil Nadu, India
关键词
Reliability; Topology; Power semiconductor devices; Switches; Stress; Reliability engineering; Integrated circuit reliability; Cost function; multilevel inverter with reduced device count (MLI with RDC); reliability; switching losses; total harmonic distortion (THD); MODEL-PREDICTIVE CONTROL; LIFETIME ESTIMATION; CONVERTER TOPOLOGY; POWER ELECTRONICS; NUMBER; OPTIMIZATION; REDUCTION; CELLS; CLASSIFICATION; GENERATION;
D O I
10.1109/TPEL.2021.3071375
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To more efficiently harness the renewable energy sources, advanced power converters have become an indispensable part in real time implementation. Multilevel inverters (MLI) appear to be a promising alternative to the classical inverters in medium power applications. This article attempts to present a quantitative review of recent reduced switch multilevel inverter topologies. The topology selection plays a vital role in utility applications. The figure of merits that have been considered for the quantitative analysis are switching losses, cost function, and reliability. The analysis has been carried out for eight asymmetric topologies, which involve reduced device count. To have a common platform for comparison, all the eight topologies are selected with 15-level output. The exhaustive analysis has been compiled in a pictorial fashion and solid conclusions have been derived for future utility. A new 15-level asymmetric MLI has been proposed in this article. The proposed inverter is validated through MATLAB/Simulink, and the results are presented. The proposed topology has been compared with existing inverter. The proposed topology has been exhaustively analyzed to figure out the impact of switching frequency and duration on time from reliability perspective. Also, the implementation level cost has been provided in detail including the various factors. The results reveal that the proposed topology provides superior performance in terms of total harmonic distortion (THD), losses, cost, and reliability.
引用
收藏
页码:11068 / 11086
页数:19
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