Modified Cascaded Boundary-Deadbeat Control for a Virtually-Grounded Three-Phase Grid-Connected Inverter With LCL Filter

被引:38
作者
He, Yuanbin [1 ]
Chung, Henry Shu-Hung [1 ,2 ]
Ho, Carl Ngai-Man [3 ]
Wu, Weimin [4 ]
机构
[1] City Univ Hong Kong, Ctr Smart Energy Convers & Utilizat Res, Kowloon, Hong Kong, Peoples R China
[2] Shanghai Maritime Univ, Res Inst Elect Automat, Shanghai 201306, Peoples R China
[3] Univ Manitoba, Dept Elect & Comp Engn, Winnipeg, MB R3T 5V6, Canada
[4] Shanghai Maritime Univ, Res Inst Elect Automat, Shanghai 201306, Peoples R China
关键词
Boundary control; deadbeat control; inverters; LCL filter; second-order switching surface; stiff grid; weak grid; 2ND-ORDER SWITCHING SURFACE; DIRECT POWER-CONTROL; CONTROL STRATEGY; DESIGN; CONVERTER; ROBUSTNESS; VSI; AC;
D O I
10.1109/TPEL.2016.2637078
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Cascaded boundary-deadbeat controller has been proven to be effective in controlling single-phase grid-connected inverter with LCL output filter. Such architecture mitigates filter resonance and offers good stability under stiff-and weak-grid conditions. However, its merits are offset by requiring many sensors, dedicated control loop to regulate the operating frequency, and high-precision intracycle information of the circuit variables to dictate the states of the switches. A modified cascaded boundary-deadbeat control law with reduced number of current sensors, the use of current band to regulate the operating frequency, and intracycle information recovery mechanism of the filter capacitor voltage for a virtually-grounded three-phase grid-connected inverter with LCL filter is presented. It inherits themerits of allowing the inverter to exhibit fast dynamic response and mitigating filter resonance. The contaminated intracycle information of the filter capacitor voltage is recovered so as to estimate and predict state trajectories accurately. Furthermore, a dc bus voltage feed-forward injection scheme with reduced number of voltage sensor is proposed. It utilizes the duty cycle information of the gate signals to compensate the effect of the unbalanced dc bus capacitor voltages on causing modulation saturation and current distortion. The system characteristics under parametric variations will be studied. A 3-kW prototype has been built and evaluated under stiff-and weak-grid conditions.
引用
收藏
页码:8163 / 8180
页数:18
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