HoneyComb: A Multi-grained Dynamically Reconfigurable Runtime Adaptive Hardware Architecture

被引：0

作者：

Thomas, Alexander ^{[1
]}

Rueckauer, Michael ^{[1
]}

Becker, Juergen ^{[1
]}

机构：

[1] Karlsruher Inst Technol KIT, Inst Tech Informationsverarbeitung, Karlsruhe, Germany

来源：

2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC) | 2011年

关键词：

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Reconfigurable computing is a promising concept for data processing. Higher parallel utilization of the given hardware resources results in better performance and lower power consumption compared to conventional approaches like von Neumann or Harvard architectures. Nevertheless, current reconfigurable solutions have their limitations and require more scientific attention. This contribution presents a new reconfigurable architecture which targets many weaknesses like array utilization, reusability and post-compile flexibility. Therefore, new features like runtime routing, multi-grained data types, partial reconfiguration and application tailored adaptability have been implemented and tightly coupled to software tools and programming languages. A demonstration chip using TSMC 90nm standard cell technology has been designed and is currently in production.

引用

页码：335 / 340

页数：6

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