Digital self-correction of time-interleaved ADCs

被引:0
作者
Harpe, P [1 ]
Zanikopoulos, A [1 ]
van Roermund, A [1 ]
机构
[1] Eindhoven Univ Technol, Mixed Signal Microelect Grp, Eindhoven, Netherlands
来源
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年
关键词
D O I
10.1109/ISCAS.2005.1465892
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A well known problem of time-interleaved analog-to-digital converters is the matching between the individual channels of the converter. Any mismatch between the channels affects the accuracy of the converter adversely. The random mismatch between the channels originates mainly from the mismatch of components like transistors and capacitors. To achieve a certain degree of matching between the channels, the sizes of the individual components have to be chosen accordingly. Especially for high-resolution converters, this means that physically large transistors are required, resulting in a large chip area, increased power consumption and reduced conversion speed. Instead of increasing sizes to achieve a certain accuracy, one can also start with an analog circuit that is relatively inaccurate from itself (allowing physically small devices), and use a digital post-correction technique afterwards to correct for the actual deviations of each component. With this method, a high accuracy can be obtained while the requirements for the components are relaxed significantly. Although these techniques have been available for single-channel converters for many years, techniques correcting the mismatch between several channels are scarce. In this paper, an existing algorithm for single-channel pipelined converters is extended to include inter-channel correction as well, requiring almost no additional hardware.
引用
收藏
页码:5541 / 5544
页数:4
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