The impact of device scaling and power supply change on CMOS gate performance

Based a new empirical mobility model that's solely dependent on T-gs, V-t, and T-ox and a corresponding saturation drain current (I-dsat) model, the impact of device scaling and power supply voltage change on CMOS inverter's performance is investigated in this paper, It shows that the T-ox which maximizes inverter's speed may be thicker than reliability consideration requires, In addition, very high speed can be achieved even at low V-dd (for low power applications) if V-t can be lowered.