共 13 条
[2]
3D chip stack technology using through-chip interconnects
[J].
IEEE DESIGN & TEST OF COMPUTERS,
2005, 22 (06)
:512-518
[5]
Effects of assembly process parameters on the structure and thermal stability of Sn-capped Cu bump bonds
[J].
57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS,
2007,
:1589-+
[6]
Koopman N., 1995, Proceedings of the Technical Program. NEPCON WEST '95, P919
[7]
High Density Cu-Cu Interconnect Bonding for 3-D Integration
[J].
2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4,
2009,
:355-359
[10]
Snoeckx K, 2007, SOLID STATE TECHNOL, V50, P53