High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding

被引：2

作者：

Hasani, Alireza ^{[1
,2
]}

Lopacinski, Lukasz ^{[1
]}

Panic, Goran ^{[1
]}

Kraemer, Rolf ^{[1
,2
]}

机构：

[1] IHP Leibniz Jnstitut Innovat Mikroelekt, D-15236 Frankfurt, Oder, Germany

[2] Brandenburg Tech Univ Cottbus, Dept Elect & Comp Engn, D-03046 Cottbus, Germany

来源：

IEEE ACCESS | 2022年 / 10卷

关键词：

Decoding; Parity check codes; Phase change materials; Schedules; Complexity theory; Throughput; Indexes; Decoding complexity; decoding throughput; LDPC code; min-sum decoding; one-hot sequence; ALGORITHMS;

D O I：

10.1109/ACCESS.2022.3141493

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The key computation in the min-sum decoding algorithm of a Low-Density Parity-Check (LDPC) is finding the first two minima and also the location of the first minimum among a set of messages passed from Variable Nodes (VNs) to Check Nodes (CNs) in a Tanner graph. In this paper, we propose a modified rejection-based scheme for this task which is able to find the one-hot sequence of the minimum location instead of its index. We show that this modification effectively reduces the complexity of min-sum decoding algorithm. Additionally, we reveal a pipelining potential in such a rejection-based architecture which facilitates the multi-frame decoding of Low-Density Parity-Check (LDPC) codes and therefore results in an improvement in decoding throughput with bearable hardware overhead. Synthesis and floorplanning in an industrial 28 nm CMOS technology show improved results in terms of throughput, power, and chip area.

引用

页码：5378 / 5389

页数：12