FPGA Implementation of Trellis Coded Modulation Decode on SDR Communication System

This study investigates the constellation mapping of the 3-bit soft-decision Viterbi decoder and the decoding system of the Viterbi decoder for trellis-coded modulation (TCM) decoding. By referring to the IESS-310 TCM standard coding scheme, LabVIEW FPGA is employed to design the corresponding decoding circuits of the 3-bit soft-decision TCM Viterbi decoder in a software-defined radio (SDR) system [1]. Finally, the study employs TCM coding and decoding circuits designed by using LabVIEW FPGA to simulate the error rate curve in the AWGN channel. The simulation results surpass the bit error rate (BER) curves of QPSK and 8PSK and the IESS-310 standard.