Improvement of Positive Bias Temperature Instability Characteristic in GaN MOSFETs by Control of Impurity Density in SiO2 Gate Dielectric

被引：0

作者：

Yonehara, T. ^{[1
]}

Kajiwara, Y. ^{[1
]}

Kato, D. ^{[1
]}

Uesugi, K. ^{[1
]}

Shimizu, T. ^{[1
]}

Nishida, Y. ^{[1
]}

Ono, H. ^{[1
]}

Shindome, A. ^{[1
]}

Mukai, A. ^{[1
]}

Yoshioka, A. ^{[2
]}

Kuraguchi, M. ^{[1
]}

机构：

[1] Toshiba Co Ltd, Corp Res & Dev Ctr, Kawasaki, Kanagawa, Japan

[2] Toshiba Device & Semicond Corp, Adv Discrete Dev Ctr, Kawasaki, Kanagawa, Japan

来源：

2017 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2017年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Threshold voltage shift of GaN MOSFET in positive bias temperature instability test was drastically suppressed by reducing certain impurity densities in SiO2 gate dielectric. An analysis to estimate the charge trap level showed electron traps in the gate dielectric caused the threshold voltage shift in GaN MOSFETs. Moreover, impurities, which formed the electron traps in SiO2, were controlled by heat treatment after SiO2 deposition, and the threshold voltage shift characteristic was improved by the reduction of the impurity densities.

引用

页数：4

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