A 1-V 9.7-mW CMOS frequency synthesizer for IEEE 802. 11a transceivers

被引:22
作者
Leung, Lincoln Lai Kan [1 ]
Luong, Howard C. [2 ]
机构
[1] Chinese Univ Hong Kong, Dept Elect Engn, Shatin, Hong Kong, Peoples R China
[2] Hong Kong Univ Sci & Technol, Dept Elect & Comp Engn, Kowloon, Hong Kong, Peoples R China
关键词
frequency divider; frequency synthesizer; low power; low voltage; transformer; voltage-controlled oscillator (VCO);
D O I
10.1109/TMTT.2007.911980
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 1-V CMOS frequency synthesizer is proposed for wireless local area network 802.11a transceivers using a novel transformer-feedback voltage-controlled oscillator (VCO) for low voltage and a stacked frequency divider for low power. Implemented in a 0.18-mu m CMOS process and operated at IN supply, the VCO measures a phase noise of -140.5 dBc at an offset of 20 MHz with a center frequency of 4.26 GHz and a power consumption of 5.17 mW. Its tuning range is as wide as 920 MHz (23%). By integrating the VCO into a frequency synthesizer, a phase noise of - 140.1 dBc/Hz at an offset of 20 MHz is measured at a center frequency of 4.26 GHz. Its output frequency can be changed from 4.112 to 4.352 GHz; by switching the 3-bit modulus of the programmable divider. The synthesizer consumes only 9.7 mW and occupies a chip area of 1.28 mm(2).
引用
收藏
页码:39 / 48
页数:10
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