PMSMC: Priority-based Multi-requestor Scheduler for Embedded System Memory Controller

被引:1
作者
El-Moursy, Ali A. [1 ]
Sibai, Fadi N. [2 ]
El-Moursy, Magdy A. [3 ]
Mohamed, Ahmed S. S. [4 ]
机构
[1] Univ Sharjah, Comp Engn Dept, Sharjah, U Arab Emirates
[2] Prince Mohammad Bin Fahd Univ, Coll Comp Engn & Sci, Al Khobar, Saudi Arabia
[3] Mentor, Wilsonvilles, OR USA
[4] Cairo Univ, Comp Engn Dept, Fac Engn, Giza, Egypt
关键词
Memory controller; Request scheduling; Multicore processors; Real-time systems; Priority scheduling; PERFORMANCE; DRAM;
D O I
10.1016/j.jpdc.2020.01.001
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Modern Multi-Processor System-On-Chips (MPSOC) are widely used especially in real-time embedded systems due to their high throughput and low per unit cost. However, bounded latency is vital to guarantee fast response as well as fairness for applications running on multicore processors. In this paper, a new Priority-base Memory Controller for Embedded Systems (PMSMC) that prioritizes concurrently running applications by assigning uneven quota for each requestor is proposed. Each requestor quota is accompanied by a timer to control the dispatch rate to prevent starvation. Moreover, PMSMC can monitor the real-time application memory activity to assist the request scheduling to achieve efficient utilization of the shared DRAM resource while keeping the timing bounded. Hence, PMSMC can serve both multimedia real-time applications and hard real-time applications concurrently. For 8-core processors, PMSMC is able to achieve an overall performance speedup of 24% and 16% compared to the recently proposed WCAD and TRB-SP memory controllers, respectively. For the Energy-Delay Product (EDP) metric which combines both performance and energy consumption, PMSMC achieves lower EDPs of 25% and 60% compared to the recently proposed WCAD and TRB-SP memory controllers, respectively. (C) 2020 Elsevier Inc. All rights reserved.
引用
收藏
页码:135 / 147
页数:13
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