Remote Low-Power Digital Design System

被引:0
|
作者
AbuShanab, Shatha [1 ]
Winzker, Marco [1 ]
Brueck, Rainer [2 ]
机构
[1] Bonn Rhine Sieg Univ Appl Sci, St Augustin, Germany
[2] Univ Siegen, Siegen, Germany
来源
2015 IEEE JORDAN CONFERENCE ON APPLIED ELECTRICAL ENGINEERING AND COMPUTING TECHNOLOGIES (AEECT) | 2015年
关键词
Education; FPGA; Low-power design; Remote lab;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This contribution will discuss the architecture and operation of a remote low-power digital design system at the Bonn-Rhine-Sieg University in Germany for teaching the concepts of low-power digital circuit design. Recently, a low-power digital system is an essential technological need due to the high demand for portable devices with less weight. The design of an efficient digital circuit in term of low-power has become a very challenging problem. Therefore, teaching low-power digital design for electrical and computer engineering students is valuable, and it is essential to have practical laboratory exercises available. The laboratory experiments use a field programmable gate array (FPGA) as a design platform for circuit implementation by the students. Remote laboratories offer on-line experiments which are not restricted to a geographical place and allow performing laboratory experiments using real instruments and obtaining real data.
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页数:6
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