Real-Time Implementation of Discrete Wavelet Transform on FPGA

被引：0

作者：

Bahoura, Mohammed ^{[1
]}

Ezzaidi, Hassan ^{[2
]}

机构：

[1] Univ Quebec, Dept Engn, 300 Allee Ursulines, Rimouski, PQ G5L 3A1, Canada

[2] Univ Quebec Chicoutimi, Dept Appl Sci, Chicoutimi, PQ, Canada

来源：

2010 IEEE 10TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS (ICSP2010), VOLS I-III | 2010年

关键词：

VLSI ARCHITECTURE; SIGNAL;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a real-time architecture for forward/inverse wavelet transforms that take into account the group delays of the used filters. The main idea is based on the equalization of the filter path delays. The perfect reconstruction of this architecture was evaluated for various data widths. This architecture was implemented on FPGA using XUP Virtex-II Pro development board.

引用

页码：191 / +

页数：2

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