Extraction of trapped charge in 4H-SiC metal oxide semiconductor field effect transistors from subthreshold characteristics

A technique for characterizing trapped charge in silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) based only on the subthreshold I-V characteristics and its degradation under bias temperature stress is described. The method utilizes the large departure of the subthreshold slope from a constant value, due to large and exponentially rising D-IT (density of interface traps) near band edges for SiC/SiO2 interface. Elevated bias-temperature stress experiments demonstrate the feasibility of separating Delta N-IT (increase in interface trapped charge) from slow trapping components like Delta N-OT (increase in oxide trapped charge) with minimal error due to extrapolation of subthreshold current to midgap potentials. A slow trap, dissimilar to either interface or oxide states close to the interface, dominates degradation at elevated temperature. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3611029]