A Low Power Highly Linear CMOS Current Mode Up-Conversion Mixer

In order to decrease the power dissipation and supply voltage, a current mode up-conversion mixer for RF transmitter is proposed in this paper. Different from the traditional Gilbert structure, the mixer replaces the transconductance stage with current mirrors. This method can bring enough conversion gain and high linearity. The way of current bleeding is also adopted here to improve the performance. The simulation is made by Cadence Spectre in CHRT 0.18 mu m CMOS mixed signal/RF process. The simulation results indicate that the mixer achieves 24.5dBm third-order input intercept point (IIP3), 5dB conversion gain and 14.9dB SSB noise figure while its power dissipation is only 3.8mW under 1.2 V supply voltage. It is especially suitable for low power mobile communication.