A Low Power Highly Linear CMOS Current Mode Up-Conversion Mixer

被引：0

作者：

Wang, Chunhua ^{[1
]}

Shi, Xiangyue ^{[1
]}

Du, Sichun ^{[1
]}

Wan, Qiuzhen ^{[1
]}

Sun, Jingru ^{[1
]}

机构：

[1] Hunan Univ, Sch Comp & Commun, Changsha 410082, Hunan, Peoples R China

来源：

FREQUENZ | 2010年 / 64卷 / 11-12期

基金：

中国国家自然科学基金;

关键词：

CMOS; up-conversion mixer; current mode; current bleeding; Volterra series;

D O I：

10.1515/FREQ.2010.64.11-12.246

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In order to decrease the power dissipation and supply voltage, a current mode up-conversion mixer for RF transmitter is proposed in this paper. Different from the traditional Gilbert structure, the mixer replaces the transconductance stage with current mirrors. This method can bring enough conversion gain and high linearity. The way of current bleeding is also adopted here to improve the performance. The simulation is made by Cadence Spectre in CHRT 0.18 mu m CMOS mixed signal/RF process. The simulation results indicate that the mixer achieves 24.5dBm third-order input intercept point (IIP3), 5dB conversion gain and 14.9dB SSB noise figure while its power dissipation is only 3.8mW under 1.2 V supply voltage. It is especially suitable for low power mobile communication.

引用

页码：246 / 251

页数：6

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