Development of Low Power Cryogenic Readout Integrated Circuits Using Fully-Depleted-Silicon-on-Insulator CMOS Technology for Far-Infrared Image Sensors

被引：23

作者：

Wada, T. ^{[1
]}

Nagata, H. ^{[1
]}

Ikeda, H. ^{[1
]}

Arai, Y. ^{[2
]}

Ohno, M. ^{[3
]}

Nagase, K. ^{[1
,4
]}

机构：

[1] Japan Aerosp Explorat Agcy, Inst Space & Astronaut Sci, Sagamihara, Kanagawa 2525210, Japan

[2] High Energy Accelerator Res Org, Tsukuba, Ibaraki 3050801, Japan

[3] Natl Inst Adv Ind Sci & Technol, Tsukuba, Ibaraki 3058568, Japan

[4] Grad Univ Adv Studies, Sagamihara, Kanagawa 2525210, Japan

来源：

JOURNAL OF LOW TEMPERATURE PHYSICS | 2012年 / 167卷 / 5-6期

关键词：

Low temperature; Low power; FD-SOI CMOS; Readout IC; Infrared astronomy; ARRAY;

D O I：

10.1007/s10909-012-0461-6

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

We are developing low power cryogenic readout integrated circuits (ROICs) for large format far-infrared image sensors using fully-depleted-silicon-on-insulator (FD-SOI) CMOS technology. We have evaluated the characteristics of MOS FETs fabricated by the FD-SOI CMOS technology and have found that both p-ch and n-ch FETs show good static performance below the liquid helium temperature, where n-ch FETs fabricated by conventional bulk-CMOS technology usually suffer from anomalous behaviors such as kink and hysteresis. We have also designed and fabricated an operational amplifier (OP-AMP) and have successfully demonstrated that the OP-AMP works at the liquid helium temperature with an open loop gain of 7000 and a power consumption of 1.3 mu W. The noise is dominated by mainly 1/f and has a value of 19 mu V/root Hz at 1 Hz.

引用

页码：602 / 608

页数：7

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