Modeling and Analysis of Substrate Noise Coupling in Analog and RF ICs

被引：6

作者：

Nagata, Makoto ^{[1
]}

机构：

[1] Kobe Univ, Grad Sch Syst Informat, Dept Informat Sci, Kobe, Hyogo 6578501, Japan

来源：

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | 2012年 / E95A卷 / 02期

关键词：

substrate noise; substrate crosstalk; substrate integrity; power supply integrity; mixed analog digital circuits; very large scale integration; CMOS; SIMULATION; DESIGN; POWER; GENERATION; VCO;

D O I：

10.1587/transfun.E95.A.430

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Substrate noise coupling has been seriously concerned in the design of advanced analog and radio frequency (RF) integrated circuits (ICs). This paper reviews recent advancements in the modeling, analysis, and evaluation of substrate noise coupling at IC chip level. Noise generation from digital circuits and propagation to the area of analog circuits are clearly visualized both by full-chip simulation as well as by on-chip measurements, for silicon test vehicles. The impacts of substrate noise coupling are also in-depth discussed at device, circuit, as well as system levels. Overall understanding of substrate noise coupling will then provide the basics for highly reliable design of analog and RF ICs.

引用

页码：430 / 438

页数：9

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