Two-Dimensional Carrier Profiling by Scanning Tunneling Microscopy and Its Application to Advanced Device Development

A high-resolution two-dimensional (2D) carrier profiling technique has been desired to optimize the dopant profile around the source/drain and extension region in transistors to enhance electrical characteristics when scaling the gate length down to less than 50 nm. At Fujitsu Semiconductor Ltd., high spatial resolution of about 1 nm has been achieved by scanning tunneling microscopy to enable the 2D carrier profiling technique to be applied to the development of scaled transistors beyond the 90-nm technology node. The dependence of the 20 carrier profile on process conditions was found to agree well with that of electrical characteristics. On the basis of such profiles, the dopant profile in scaled transistors has been optimized. The technique also enables an evaluation of dopant distribution fluctuations that cause variability in transistor performance. The dopant profile around the extension region was found to depend on the gate line edge roughness. On the basis of the measured results, various methodologies for suppressing transistor performance variability have been proposed.