A Design Methodology of High-Efficiency Dimmable Current Sink for Current-Regulated Drivers

This paper proposes a high-efficiency and dimmable current sink topology along with a design methodology for low node processes. The design methodology is demonstrated using a boost-based WLED driver application. In this work, the focus is on current regulation rather than voltage regulation. Therefore, the proposed topology exploits a smaller and faster NMOS pass device, replacing the conventional PMOS-based LDO arrangement. An amplifier-boosted pass-transistor current sink topology combined with a 5-bit programmable degenerated source resistor is being utilized for high-efficiency and brightness control. The realized WLED driver validates the proposed topology and the design methodology utilizing 40 nm CMOS TSMC technology. The design takes advantage of the programmability of the resistor to enhance the system's power efficiency. This programmable resistor enables dimmability via current segmentation with a 1 mA step for a total of 25 mA. For a 500 mV voltage ripple at the DC-DC converter output driving 6 WLEDs with a 3.2 V forward voltage drop each, a worst-case current ripple of 200 mu A and simulated efficiency of 97.6% is achieved for optimum pass-transistor size.