A self-controlled and dynamically reconfigurable architecture

被引：0

作者：

Dittmann, F ^{[1
]}

Rettberg, A ^{[1
]}

机构：

[1] Univ Gesamthsch Paderborn, D-4790 Paderborn, Germany

来源：

DESIGN METHODS AND APPLICATIONS FOR DISTRIBUTED EMBEDDED SYSTEMS | 2004年 / 150卷

关键词：

high-level synthesis; reconfigurable architectures; embedded systems;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Reconfigurable systems have the potential to combine the performance of ASICs with the flexibility of software. The architecture presented in this paper offers a new concept for reconfiguration by operating self-timed and self-controlling. Data is routed together with its control information in a so-called packet through the operator network to make local decisions concerning the behavior of the network. Therefore, we can realize different paths without a central control unit. In this paper, we describe the architecture from the aspect of reconfiguration. An example shows the architecture in practical operation.

引用

页码：207 / 216

页数：10

共 14 条

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