Design of a novel triple reduced surface field LDMOS with partial linear variable doping n-type top layer

被引:7
作者
Qiao, Ming [1 ]
Li, Chengzhou [1 ]
Liu, Yihe [1 ]
Wang, Yuru [1 ]
Li, Zhaoji [1 ]
Zhang, Bo [1 ]
机构
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China
基金
中国国家自然科学基金;
关键词
Triple RESURF; Breakdown voltage; Specific on-resistance; Partial linear variable doping; N-type top layer; ON-RESISTANCE; RESURF LDMOS; DMOS;
D O I
10.1016/j.spmi.2016.03.038
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
A novel triple reduced surface field (RESURF) lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS) with partial linear variable doping (LVD) N-type top (N-top) layer is proposed in this paper. Compared with the conventional triple RESURF LDMOS, a partial LVD N-top layer is introduced in the surface of N-well, providing a low on-resistance conduction path and leading to an optimized surface electric field, which alleviates the inherent tradeoff between the breakdown voltage (BV) and specific on resistance (R-on,R-sp). With the n-drift region length of 70 mu m, the novel triple RESURF LDMOS obtains a high BV of 847 V and a low R-on,R-sp of 79 m Omega cm(2) which are 76 V higher and 46 m Omega cm(2) lower than those of the conventional triple RESURF LDMOS. Therefore, the novel triple RESURF LDMOS can greatly improve the tradeoff between BV and R-on,R-sp. Furthermore, compared with the other existing technologies in the high BV level, the novel triple RESURF LDMOS can achieve a highest figure of merit (FOM, defined as BV2/R-on,R-sp) of 9.08 MW/cm(2) and the conventional RESURF silicon limits are broken. (C) 2016 Elsevier Ltd. All rights reserved.
引用
收藏
页码:242 / 247
页数:6
相关论文
共 29 条
[1]  
Apples J., 1979, IEEE INT ELECT DEVIC, V10, P238
[2]  
Arienti G., 2015, P ISPSD, P10
[3]  
ARNOLD E, 1996, P ISPSD, P93
[4]   A novel low specific on-resistance double-gate LDMOS with multiple buried p-layers in the drift region based on the Silicon-On-Insulator substrate [J].
Chen, Yinhui ;
Hu, Shengdong ;
Cheng, Kun ;
Jiang, YuYu ;
Luo, Jun ;
Wang, Jian'an ;
Tang, Fang ;
Zhou, Xichuan ;
Zhou, Jianlin ;
Gan, Ping .
SUPERLATTICES AND MICROSTRUCTURES, 2016, 89 :59-67
[5]  
Disney DR, 2001, ISPSD'01: PROCEEDINGS OF THE 13TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, P399, DOI 10.1109/ISPSD.2001.934638
[6]   New Superjunction LDMOS Breaking Silicon Limit by Electric Field Modulation of Buffered Step Doping [J].
Duan, Baoxing ;
Cao, Zhen ;
Yuan, Xaoning ;
Yuan, Song ;
Yang, Yintang .
IEEE ELECTRON DEVICE LETTERS, 2015, 36 (01) :47-49
[7]   A 700V lateral power MOSFET with narrow gap double metal field plates realizing low on-resistance and long-term stability of performance [J].
Fujishima, N ;
Saito, M ;
Kitamura, A ;
Urano, Y ;
Tada, G ;
Tsuruta, Y .
ISPSD'01: PROCEEDINGS OF THE 13TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 2001, :255-258
[8]  
Hossain Z, 2002, PROCEEDINGS OF THE 14TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, P137
[9]   Efficacy of charge sharing in reshaping the surface electric field in high-voltage lateral RESURF devices [J].
Imam, M ;
Quddus, M ;
Adams, J ;
Hossain, Z .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (01) :141-148
[10]   ON THE STATIC PERFORMANCE OF THE RESURF LDMOSFETS FOR POWER ICS [J].
Iqbal, Md Mash-Hud ;
Udrea, Florin ;
Napoli, Ettore .
2009 21ST INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 2009, :247-+