A Modular Approach to Arithmetic and Logic Unit Design on a Reconfigurable Hardware Platform for Educational Purpose

被引:0
|
作者
Oztekin, Halit [1 ,2 ]
Temurtas, Feyzullab [1 ]
Gulbag, Ali [2 ]
机构
[1] Bozok Univ, Dept Elect & Elect Engn, Yozgat, Turkey
[2] Sakarya Univ, Inst Sci Technol, Dept Comp Engn, Sakarya, Turkey
关键词
Arithmetic and Logic Unit design; Educational tool; FPGA; Computer Architecture and Organization; Teaching method; Modular Approach;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The Arithmetic and Logic Unit (ALU) design is one of the important topics in Computer Architecture and Organization course in Computer and Electrical Engineering departments. There are ALU designs that have non-modular nature to be used as an educational tool. As the programmable logic technology has developed rapidly, it is feasible that ALU design based on Field Programmable Gate Array (FPGA) is implemented in this course. In this paper, we have adopted the modular approach to ALU design based on FPGA. All the modules in the ALU design are realized using schematic structure on Altera's Cyclone II Development board. Under this model, the ALU content is divided into four distinct modules. These are arithmetic unit except for multiplication and division operations, logic unit, multiplication unit and division unit. User can easily design any size of ALU unit since this approach has the modular nature. Then, this approach was applied to microcomputer architecture design named BZK.SAU.FPGA10.0 instead of the current ALU unit.
引用
收藏
页码:338 / +
页数:2
相关论文
共 50 条
  • [41] Virtual hardware byte code as a design platform for reconfigurable embedded systems
    Lange, S
    Kebschull, U
    DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, PROCEEDINGS, 2003, : 302 - 307
  • [42] New Modular Product-Platform-Planning Approach to Design Macroscale Reconfigurable Unmanned Aerial Vehicles
    Chowdhury, Souma
    Maldonado, Victor
    Tong, Weiyang
    Messac, Achille
    JOURNAL OF AIRCRAFT, 2016, 53 (02): : 309 - 322
  • [43] Unit testing based approach for reconfigurable logic controllers verification
    Doligalski, Michal
    Tkacz, Jacek
    Bukowiec, Arkadiusz
    Gratkowski, Tomasz
    PHOTONICS APPLICATIONS IN ASTRONOMY, COMMUNICATIONS, INDUSTRY, AND HIGH-ENERGY PHYSICS EXPERIMENTS 2015, 2015, 9662
  • [44] Design and implementation of a reversible logic based 8-bit arithmetic and logic unit
    Arunachalam, Kamaraj
    Perumalsamy, Marichamy
    Sundaram, C. Kalyana
    Kumar, J. Senthil
    International Journal of Computers and Applications, 2014, 36 (02) : 49 - 55
  • [45] An Approach of Hardware and Software Partitioning for the Wearables Design with Limited Reconfigurable Hardware Resources
    Mansur Guimaraes, Rodolfo Labiapari
    Rabelo Oliveira, Ricardo Augusto
    2018 VIII BRAZILIAN SYMPOSIUM ON COMPUTING SYSTEMS ENGINEERING (SBESC 2018), 2018, : 91 - 98
  • [46] SurfaceConstellations: A Modular Hardware Platform for Ad-Hoc Reconfigurable Cross-Device Workspaces
    Marquardt, Nicolai
    Brudy, Frederik
    Liu, Can
    Bengler, Benedikt
    Holz, Christian
    PROCEEDINGS OF THE 2018 CHI CONFERENCE ON HUMAN FACTORS IN COMPUTING SYSTEMS (CHI 2018), 2018,
  • [47] The PERPLEXUS bio-inspired hardware platform: A flexible and modular approach
    Upegui, Andres
    Thoma, Yann
    Sanchez, Eduardo
    Perez-Uribe, Andres
    Manuel Moreno, Juan
    Madrenas, Jordi
    Sassatelli, Gilles
    INTERNATIONAL JOURNAL OF KNOWLEDGE-BASED AND INTELLIGENT ENGINEERING SYSTEMS, 2008, 12 (03) : 201 - 212
  • [48] A reconfigurable arithmetic logic unit for elliptic curve cryptosystems over GF(2m)
    Schmalisch, M
    Timmermann, D
    PROCEEDINGS OF THE 46TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS & SYSTEMS, VOLS 1-3, 2003, : 831 - 834
  • [49] A Combined Arithmetic Logic Unit and Memory Element for the Design of a Parallel Computer
    Rahman, Mohammed Ziaur
    ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, PT I: ICA3PP 2011, 2011, 7916 : 306 - 317
  • [50] DESIGN OF FAULT TOLERANT ARITHMETIC & LOGICAL UNIT USING REVERSIBLE LOGIC
    Kaur, Taranjot
    Singh, Nirmal
    2013 INTERNATIONAL CONFERENCE ON MACHINE INTELLIGENCE AND RESEARCH ADVANCEMENT (ICMIRA 2013), 2013, : 331 - 334