Development of SOI High Voltage CMOS process for Plasma Display Panel driver ICs

For Plasma Display Panel (PDP) driver ICs, a new High Voltage CMO (HV-CMOS) process utilizing the bonded SOI (Silicon-On-Insulator) substrate has been developed. The dielectric isolation has been realized by SOI and trench process. 0.5 mu m rule CMOS process has been adopted for the first time in the HV-CMOS process. In this process, 5 V logic circuit and high voltage output circuit can be integrated densely on a same chip. The 200 V rating n-channel MOSFET (NMOS) and p-channel Double-Diffused MOSFET (PDMOS) have been fabricated on 5 mu m-thick SOI and sufficient electrical characteristics for the PDP driver IC have been achieved. The chip size of the fabricated PDP scan driver IC could be reduced by 40% compared with the conventional one and high-speed switching function has been confirmed.