Reduction of Ground Bounce Noise in High Speed Printed Circuit Board

被引:0
作者
Charyulu, L. N. [1 ]
Subbarao, B. [1 ]
Sivaramakrishnan, R. [1 ]
机构
[1] SAMEER Ctr Electromagnet, Madras 600113, Tamil Nadu, India
来源
INCEMIC 2006: 9TH INTERNATIONAL CONFERENCE ON ELECTROMAGNETIC INTERFERENCE AND COMPATIBILITY, PROCEEDINGS | 2006年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the suppression of Ground Bounce Noise (GBN) or Simultaneous Switching Noise (SSN) in high Speed printed circuit board (PCB). The effectiveness of the slot length in the common ground / power plane in the-PCB for the coupling noise is simulated using Ansoft-HFSS (High Frequency Structure Simulator) package. The position of feed point between the two planes optimized was presented. A simple configuration was devised to reduce the coupling noise in the frequency range of interest. Better than -50 dB coupling is achieved using this optimized structure in the frequency band of 0.48 - 1.83GHz. The various stages of design optimization of the PCB is discussed for the new structure keeping in view of practical solution to achieve low coupling in the high speed PCB.
引用
收藏
页码:15 / 18
页数:4
相关论文
共 5 条
[1]  
Costa V, 2004, 2004 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SYMPOSIUM RECORD 1-3, P39
[2]  
Hall S. H., 2000, High-speed Digital System Design, A handbook o finterconnect theory and design practices
[3]  
Lee J, 2004, 2004 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SYMPOSIUM RECORD 1-3, P35
[4]  
Shahparnia S., 2004, IEEE T ELECTROMAGNET, V46, P2004
[5]  
Wu T.L., 2004, IEEE MICROWAVE WIREL, V14