Matching Properties of Femtofarad and Sub-Femtofarad MOM Capacitors

被引:42
作者
Omran, Hesham [1 ]
Alahmadi, Hamzah [1 ,2 ]
Salama, Khaled N. [1 ]
机构
[1] KAUST, Comp Elect & Math Sci & Engn Div CEMSE, Thuwal 239556900, Saudi Arabia
[2] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
关键词
Analog-to-digital converter (ADC); capacitance-to-digital converter (CDC); capacitive digital-to-analog converter (CapDAC); capacitor mismatch; energy-efficient circuits; metal-oxide-metal (MOM) capacitors; mismatch characterization; programmable capacitor array (PCA); SAR ADC;
D O I
10.1109/TCSI.2016.2537824
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Small metal-oxide-metal (MOM) capacitors are essential to energy-efficient mixed-signal integrated circuit design. However, only few reports discuss their matching properties based on large sets of measured data. In this paper, we report matching properties of femtofarad and sub-femtofarad MOM vertical-field parallel-plate capacitors and lateral-field fringing capacitors. We study the effect of both the finger-length and finger-spacing on the mismatch of lateral-field capacitors. In addition, we compare the matching properties and the area efficiency of vertical-field and lateral-field capacitors. We use direct mismatch measurement technique, and we illustrate its feasibility using experimental measurements and Monte Carlo simulations. The test-chips are fabricated in a 0.18 mu m CMOS process. A large number of test structures is characterized (4800 test structures), which improves the statistical reliability of the extracted mismatch information. Despite conventional wisdom, extensive measurements show that vertical-field and lateral-field MOM capacitors have the same matching properties when the actual capacitor area is considered. Measurements show that the mismatch depends on the capacitor area but not on the spacing; thus, for a given mismatch specification, the lateral-field MOM capacitor can have arbitrarily small capacitance by increasing the spacing between the capacitor fingers, at the expense of increased chip area.
引用
收藏
页码:763 / 772
页数:10
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