IP watermarking using incremental technology mapping at logic synthesis level

被引:35
作者
Cui, Aijiao [1 ]
Chang, Chip Hong [1 ]
Tahar, Sofiene [2 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
[2] Concordia Univ, Dept Elect & Comp Engn, Montreal, PQ H3G 1M8, Canada
关键词
digital watermarking; incremental technology mapping; intellectual property (IP) protection (IPP); logic synthesis;
D O I
10.1109/TCAD.2008.927732
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. The headroom of each disjoint closed cone is evaluated based on its slack and slack sustainability. The notion of slack sustainability in conjunction with an embedding threshold enables closed cones in the critical path to be qualified as watermark hosts if their slacks can be better preserved upon remapping. The watermark is embedded by remapping only qualified disjoint closed cones randomly selected and templates constrained by the signature. This parametric formulation provides a means to capitalize on the headroom of a design to increase the signature length or strengthen the watermark resilience. With the master design, the watermarked design can be authenticated as in nonoblivious media watermarking. Experimental results show that the design can be efficiently marked by our method with low overhead.
引用
收藏
页码:1565 / 1570
页数:6
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