The hardware structure design of perceptron with FPGA implementation

被引:0
|
作者
Wang, QR [1 ]
Yi, B [1 ]
Xie, Y [1 ]
Liu, BR [1 ]
机构
[1] Guangdong Univ Technol, Fac Automat, Guangzhou 510080, Peoples R China
来源
2003 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS, VOLS 1-5, CONFERENCE PROCEEDINGS | 2003年
关键词
neural networks; perceptron; FPGA; VHDL; Top-Down;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Most commonly, neural networks's models or algorithms are simulated and implemented by computer programming in neural networks theory research. But in many practical applications, it is necessary to consider essential issues such as hardware implementation. Specific application of neural networks hardware has the advantages of high speed, small in size, good performance and low cost. Thus, the implementation of high performance neural networks hardware is the final target in some actual applications. In this paper, a hardware structure of single perceptron that serves as the basic nerve cell and its implementation method with FPGA is introduced. It is based on VLSI implementation approach for the standard neural networks. The method proposed is a primary discussion and research for the hardware implementation of artificial neural networks.
引用
收藏
页码:762 / 767
页数:6
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