A 12-b 16-GS/s RF-Sampling Capacitive DAC for Multi-Band Soft Radio Base-Station Applications With On-Chip Transmission-Line Matching Network in 16-nm FinFET

被引:7
作者
Gruber, Daniel [1 ]
Clara, Martin [2 ]
Perez, Ramon Sanchez [3 ]
Wang, Yu-Shan [4 ]
Duller, Christoph [1 ]
Rauter, Gerald [1 ]
Torta, Patrick [1 ]
Knoblinger, Gerhard [1 ]
Azadet, Kamran [2 ]
机构
[1] Intel Austria GmbH, A-9524 Villach, Austria
[2] Intel Corp, Santa Clara, CA 95054 USA
[3] Intel Corp, Madrid 28020, Spain
[4] Intel Corp, Hillsboro, OR 97124 USA
关键词
Computer architecture; Voltage; Microprocessors; Radio frequency; Linearity; Capacitors; Power dissipation; Capacitive D; A converter (CDAC); digital pre-distortion (DPD); direct RF-sampling; segment mismatch correction (SMC); soft radio; transmission-line transformer (TLT); DIGITAL PREDISTORTION; ADC;
D O I
10.1109/JSSC.2021.3109489
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 16-GS/s single 1.2-V supply direct RF-sampling capacitive D/A converter for soft radio base-station applications is implemented in a 16-nm FinFET technology. Due to co-integration with a wideband on-chip matching network, the D/A converter (DAC) is capable of signal synthesis between 600 MHz and 8 GHz, with a measured peak RF output power of +5.6 dBm. The linearity required by cellular base-station applications is achieved by employing several analog-domain linearization techniques, yielding a two-tone intermodulation distortion of better than -70 dBc up to the first Nyquist frequency. When transmitting a true multiband signal covering an instantaneous bandwidth of 1 GHz, an adjacent channel leakage ratio (ACLR) of better than -69 dBc is achieved. Digital segment mismatch correction is shown to improve the linearity of a segmented DAC in deep digital backoff operation. A full-rate digital pre-distortion (DPD) method with efficient model identification is experimentally demonstrated. Using DPD, the design achieves an spurious free dynamic range (SFDR) of better than 72 dBc over the entire 0.6-6-GHz frequency range.
引用
收藏
页码:3655 / 3667
页数:13
相关论文
共 25 条
[1]   A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration [J].
Ali, Ahmed M. A. ;
Dinc, Huseyin ;
Bhoraskar, Paritosh ;
Bardsley, Scott ;
Dillon, Chris ;
McShea, Matthew ;
Periathambi, Joel Prabhakar ;
Puckett, Scott .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55 (12) :3210-3224
[2]   A Wideband RF Mixing-DAC Achieving IMD <-82 dBc Up to 1.9 GHz [J].
Bechthum, Elbert ;
Radulov, Georgi I. ;
Briaire, Joost ;
Geelen, Govert J. G. M. ;
van Roermund, Arthur H. M. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2016, 51 (06) :1374-1384
[3]   A Fully Integrated 27-dBm Dual-Band All-Digital Polar Transmitter Supporting 160 MHz for Wi-Fi 6 Applications [J].
Ben-Bassat, Assaf ;
Gross, Shahar ;
Lane, Aaron ;
Nazimov, Anna ;
Khamaisi, Bassam ;
Solomon, Elad ;
Banin, Elan ;
Borokhovich, Eli ;
Kimiagorov, Nahum ;
Dinur, Nati ;
Skliar, Phillip ;
Cohen, Roi ;
Banin, Rotem ;
Zur, Sarit ;
Reinhold, Sebastian ;
Breuer-Bruker, Smadar ;
Abuhazira, Tomer ;
Livneh, Tom ;
Maimon, Tzvi ;
Parker, Uri ;
Ravi, Ashoke ;
Degani, Ofir .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55 (12) :3414-3425
[4]  
Clara M., 2020, U.S. Patent, Patent No. [10 715 185 B1, 10715185]
[5]   A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology [J].
Devarajan, Siddharth ;
Singer, Larry ;
Kelly, Dan ;
Pan, Tao ;
Silva, Jose ;
Brunsilius, Janet ;
Rey-Losada, Daniel ;
Murden, Frank ;
Speir, Carroll ;
Bray, Jeffery ;
Otte, Eric ;
Rakuljic, Nevena ;
Brown, Phil ;
Weigandt, Todd ;
Yu, Qicheng ;
Paterson, Donald ;
Petersen, Corey ;
Gealow, Jeffrey ;
Manganaro, Gabriele .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (12) :3204-3218
[6]  
Engel Gil, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits), pC166, DOI 10.1109/VLSIC.2015.7231252
[7]  
Erdmann C, 2017, ISSCC DIG TECH PAP I, P280, DOI 10.1109/ISSCC.2017.7870370
[8]  
Fulde M, 2017, ISSCC DIG TECH PAP I, P218, DOI 10.1109/ISSCC.2017.7870339
[9]  
Gunella G., 1944, BROWN BOVERI REV, V31, P327
[10]  
Keane JP, 2017, ISSCC DIG TECH PAP I, P284, DOI 10.1109/ISSCC.2017.7870372