A 0.6 V class-AB rail-to-rail CMOS OTA exploiting threshold lowering

被引：16

作者：

Centurelli, F. ^{[1
]}

Monsurro, P. ^{[1
]}

Parisi, G. ^{[1
]}

Tommasino, P. ^{[1
]}

Trifiletti, A. ^{[1
]}

机构：

[1] Univ Roma La Sapienza, DIET Dipartimento Ingn Informaz Elettron & Teleco, Rome, Italy

来源：

ELECTRONICS LETTERS | 2018年 / 54卷 / 15期

关键词：

CMOS analogue integrated circuits; operational amplifiers; capacitance; 5; pF; frequency; 8; MHz; gain; 41; dB; size; 40; nm; voltage; 0; 6; V; unity-gain buffer configuration; CMOS technology; threshold voltages; threshold lowering technique; transistors; low-voltage applications; rail-to-rail input common-mode range; operational transconductance amplifier topology; threshold lowering; class-AB rail-to-rail CMOS OTA;

D O I：

10.1049/el.2018.5175

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A class-AB OTA (operational transconductance amplifier) topology with rail-to-rail input common-mode range is proposed for application in very low-voltage applications. High efficiency is achieved by reusing transistors both for class-AB operation and for mirroring the output currents, and a threshold lowering technique is applied to allow supply voltages less than two threshold voltages. Simulations in 40 nm CMOS technology show 41 dB gain at +/- 0.3 V supply voltage, a unity-gain frequency of 8.8 MHz on a 5 pF load, class-AB behaviour and full rail-to-rail operation when closed in unity-gain buffer configuration.

引用

页码：930 / 931

页数：2

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