A layout approach to monolithic microwave IC

被引：1

作者：

Nagao, A ^{[1
]}

Shirakawa, I

Kambe, T

机构：

[1] SHARP Corp, Syst Dev Ctr, Nara 6328567, Japan

[2] Osaka Univ, Dept Informat Syst Eng, Osaka 5650871, Japan

[3] SHARP Corp, Precis Technol Dev Ctr, Nara 6328567, Japan

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1998年 / 17卷 / 12期

关键词：

graph planarization; layout synthesis; monolithic microwave integrated circuit (MMIC); rectangle packing; single-layered placement;

D O I：

10.1109/43.736566

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A layout approach for monolithic microwave integrated circuits (MMIC's) is described, in which layout elements are transistors? inductors, capacitors, resistors, coplanar waveguides, etc., implemented in a GaAs fabrication process. The layout issue typical of such MMIC's consists essentially in how to realize a single-layered placement of different shapes of layout elements under a variety of spacing and orienting constraints as well as shape variations. In this paper, the interconnection requirements among the elements are represented by a graph, to which a planarization algorithm is applied. On the basis of the planarization result, the physical placement is first constructed with the use of a merging scheme and then refined iteratively by means of a new rectangle-packing algorithm. Experimental results are also shown to demonstrate the practicability of the described layout approach.

引用

页码：1262 / 1272

页数：11

共 16 条

[11] DESIGN CONSIDERATIONS FOR MONOLITHIC MICROWAVE CIRCUITS [J].

PUCEL, RA .

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1981, 29 (06) :513-534

[12] ILAC - AN AUTOMATED LAYOUT TOOL FOR ANALOG CMOS CIRCUITS [J].

RIJMENANTS, J .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (02) :417-425

[13]

SAWA T, 1997, CAS9738 IEICE, P159

[14]

SAWA T, 1997, VLD9738 IEICE

[15]

SAWA T, 1997, DSP9753 IEICE

[16]

SHIRAISHI Y, 1990, P ICCAD, P194

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