A 5.2-GHz CMOS receiver with 62-dB image rejection

A 5.2-GHz CMOS receiver employs a double downconversion heterodyne architecture with a local oscillator frequency of 2.6 GHz and applies offset cancellation to the baseband amplifiers, Placing the image around the zero frequency, the receiver achieves an image rejection of 62 dB with no external components while minimizing the nicker noise upconversion in the first mixing operation. Realized in a 0.25-mum digital CMOS technology, the circuit exhibits a noise figure of 6.4 dB, an IP3 Of -15 dBm, and a voltage conversion gain of 43 dB, while draining 29 mW from a 2.5-V supply.