A Methodology to Integrate Thermo-Mechanical Reliability Predictions into Co-Design of Flip-Chip-On-Lead Devices

被引:1
作者
Gurrum, Siva P. [1 ]
Prakuzhy, Manu J. [1 ]
Li, Guangxu [1 ]
Lin, Hung-Yun [1 ]
Gandhi, Saumya [1 ]
Arroyo, J. Carlos [1 ]
Mortan, Frank [1 ]
Nangia, Amit [1 ]
机构
[1] Texas Instruments Inc, Semicond Packaging Technol & Mfg Grp, Dallas, TX 75243 USA
来源
2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018) | 2018年
关键词
Interconnect reliability in flip chip; Reliability/life test methods & models; Advanced Flip-Chip; PACKAGE; QFN;
D O I
10.1109/ECTC.2018.00207
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Flip-Chip-On-Lead (FCOL) interconnect based plastic packages are increasingly used in power semiconductor devices. The technology offers high design flexibility from a bump size, bump pattern, and leadframe layout point of view. Design flexibility allows the device to meet functionality, electrical and thermal performance requirements through co-design. Given the complexity of mechanical reliability, and sensitivity to design features, lack of a robust approach to assess mechanical reliability risks can cause delays in development, qualification, and ramp. This study presents a methodology to develop co-design capability for mechanical failure modes. The approach utilizes thermo-mechanical simulations correlated with empirical data to develop failure thresholds. Devices designed within the thresholds are expected to be robust through qualification and ramp.
引用
收藏
页码:1359 / 1364
页数:6
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