A Passive Excess-Loop-Delay Compensation Technique for Gm-C Based Continuous-Time ΣΔ Modulators

被引:0
|
作者
Cai, Chen-Yan [1 ]
Jiang, Yang [1 ]
Sin, Sai-Weng [1 ]
U, Seng-Pan [1 ]
Martins, Rui P. [1 ]
机构
[1] Univ Macau, Fac Sci & Technol, State Key Lab Analog & Mixed Signal VLSI, Macao, Peoples R China
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中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A method to compensate the Excess Loop Delay (ELD) in CT Sigma Delta modulators using Gm-C loop filter is presented. The proposed circuit architecture uses a resistor in series with the integration capacitor to obtain a feed-forward adder in the Gm-C integrator. The proposed ELD compensation is based on the Proportional Integrating (PI) - element method for low power dissipation and simple implementation, and it is verified through the design of a 2(nd) order CT Sigma Delta modulator which uses a Gm-C integrator as the 2(nd) stage of the loop filter. To further demonstrate the efficiency of the technique a Non-Return-to-Zero (NRZ) feedback is utilized due to its larger sensitivity to ELD. Simulation results show that a 68.9dB SNDR can be achieved with an ELD close to half clock period, while the system will be unstable without compensation for such an amount of the loop delay. These results confirm the effectiveness of the proposed ELD compensation method in Gm-C filter based CT Sigma Delta modulators.
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页数:4
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