Architecture of a testable analog fuzzy logic controller

This work discusses problems of testability of analog fuzzy logic controllers implemented as VLSI chips. Enhancements to standard architecture of fuzzy logic controllers which facilitate testing are proposed. To improve controllability and observability of internal nodes, analog switching blocks are introduced together with some additional circuitry. These blocks allow to test each basic cell of a fuzzy logic controller (e.g., membership function cell, MIN/MAX cell, etc.) separately. The analog switching blocks do not contribute to the power consumption in a working chip and therefore can be used in low-power analog fuzzy logic controllers.