Device and materials requirements for neuromorphic computing

被引:119
作者
Islam, Raisul [1 ]
Li, Haitong [1 ]
Chen, Pai-Yu [2 ]
Wan, Weier [1 ]
Chen, Hong-Yu [3 ]
Gao, Bin [4 ]
Wu, Huaqiang [4 ]
Yu, Shimeng [5 ]
Saraswat, Krishna [1 ]
Wong, H-S Philip [1 ]
机构
[1] Stanford Univ, Dept Elect Engn, 420 Via Palou Mall, Stanford, CA 94305 USA
[2] Arizona State Univ, Sch Elect Comp & Energy Engn, Tempe, AZ 85287 USA
[3] GigaDevice Semicond Inc, A12 USTB Techart Plaza,Xueyuan Rd 30, Beijing, Peoples R China
[4] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China
[5] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
关键词
neuromorphic computing; non volatile memory; deep neural network; RESISTIVE SWITCHING MEMORY; RANDOM-ACCESS MEMORY; SOLID-ELECTROLYTE; SYNAPTIC BEHAVIOR; DESIGN; OPTIMIZATION; PLASTICITY; PROSPECTS; BILAYER; SYSTEM;
D O I
10.1088/1361-6463/aaf784
中图分类号
O59 [应用物理学];
学科分类号
摘要
Energy efficient hardware implementation of artificial neural network is challenging due the 'memory-wall' bottleneck. Neuromorphic computing promises to address this challenge by eliminating data movement to and from off-chip memory devices. Emerging non-volatile memory (NVM) devices that exhibit gradual changes in resistivity are a key enabler of in-memory computing-a type of neuromorphic computing. In this paper, we present a review of some of the NVM devices (RRAM, CBRAM, PCM) commonly used in neuromorphic application. The review focuses on the trade-off between device parameters such as retention, endurance, device-to-device variation, speed and resistance levels, and the interplay with target applications. This work aims at providing guidance for finding the optimized resistive memory devices material stack suitable for neuromorphic application.
引用
收藏
页数:24
相关论文
共 155 条
[1]   Resistive Random Access Memory (ReRAM) Based on Metal Oxides [J].
Akinaga, Hiroyuki ;
Shima, Hisashi .
PROCEEDINGS OF THE IEEE, 2010, 98 (12) :2237-2251
[2]   True North: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip [J].
Akopyan, Filipp ;
Sawada, Jun ;
Cassidy, Andrew ;
Alvarez-Icaza, Rodrigo ;
Arthur, John ;
Merolla, Paul ;
Imam, Nabil ;
Nakamura, Yutaka ;
Datta, Pallab ;
Nam, Gi-Joon ;
Taba, Brian ;
Beakes, Michael ;
Brezzo, Bernard ;
Kuang, Jente B. ;
Manohar, Rajit ;
Risk, William P. ;
Jackson, Bryan ;
Modha, Dharmendra S. .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2015, 34 (10) :1537-1557
[3]   Unsupervised Learning by Spike Timing Dependent Plasticity in Phase Change Memory (PCM) Synapses [J].
Ambrogio, Stefano ;
Ciocchini, Nicola ;
Laudato, Mario ;
Milo, Valerio ;
Pirovano, Agostino ;
Fantini, Paolo ;
Ielmini, Daniele .
FRONTIERS IN NEUROSCIENCE, 2016, 10
[4]  
Ando K, 2017, SYMP VLSI CIRCUITS, pC24, DOI 10.23919/VLSIC.2017.8008533
[5]   YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration [J].
Andri, Renzo ;
Cavigelli, Lukas ;
Rossi, Davide ;
Benini, Luca .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 37 (01) :48-60
[6]  
Angizi Shaahin, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Proceedings, P45, DOI 10.1109/ISVLSI.2017.18
[7]  
[Anonymous], TEEE INT EL DEV M
[8]  
[Anonymous], IEEE INT EL DEV M
[9]  
[Anonymous], P 3 INT C LEARNING R
[10]  
[Anonymous], IEEE INT EL DEV M DE