Modeling and simulation of coupling effect on low frequency noise in advanced SOI MOSFETS

Low frequency noise modeling and numerical simulation have been carried out to study the influence of the back interface quality and the silicon film thickness in Fully Depleted SOI MOSFETs, with special emphasis on the coupling effect. In devices with a standard film thickness, the noise level is higher than for an equivalent interface in bulk device, which could be a great concern for analog applications. On the other hand, it has been shown that in very thin SOI devices with a symmetrical structure (Double Gate architecture), the reduction of electric field in the silicon film, induces a conduction channel in the middle of the film, away from both interfaces which in turn reduces the scattering rate of carriers, decreasing the noise level.