PVD-HfSiON gate dielectrics with Ni-FUSI electrode for 65nm LSTP application

被引：5

作者：

Yamamoto, K

Kubicek, S

Rothschild, A

Mitsuhashi, R

Deweerd, W

Veloso, A

Jurczak, A

Biesemans, S

De Gendt, S

Wickramanayaka, S

Hayashi, S

Niwa, A

机构：

[1] IMEC, B-3001 Heverlee, Belgium

[2] IMEC, Louvain, Belgium

来源：

MICROELECTRONIC ENGINEERING | 2005年 / 80卷

关键词：

high-k gate; hafnium oxide; HfSiON; FUSI; physical vapor deposition; oxidation;

D O I：

10.1016/j.mee.2005.04.068

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

HfSiON gate dielectrics are fabricated by oxidation of co-sputtered Hf and Si, followed by nitridation with NH3 gas. It is found that HfSiO film stays in an amorphous state after oxidation, while HfO2 film tends to crystallize. Due to its thermally robust properties of HfSiON, lower gate leakage and good uniformity are achieved even after high thermal treatment (above 1000 degrees C). A reduction in capacitance due to lower permittivity is compensated by the introduction of a Ni-FUSI electrode, where improved inversion capacitance leads to a higher on-state drive current.

引用

页码：198 / 201

页数：4

共 12 条

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Kubicek, S
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Jurczak, M
Biesemans, S
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[5] A thermally robust Ni-FUSI process using in 65 nm CMOS technology
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[6] 45nm LSTP FET with FUSI gate on PVD-HfO2 with excellent drivability by advanced PDA treatment
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