Power Integrity Comparison of Off-chip, On-interposer, On-chip Voltage Regulators in 2.5D/3D ICs

被引：0

作者：

Kim, Subin ^{[1
]}

Cho, Kyungjun ^{[1
]}

Park, Shinyoung ^{[1
]}

Park, Hyunwook ^{[1
]}

Kim, Seongguk ^{[1
]}

Jeong, Seungtaek ^{[1
]}

Son, Kyungjune ^{[1
]}

Kim, Joungho ^{[1
]}

机构：

[1] Korea Adv Inst Sci & Technol, TeraByte Interconnect & Package Lab, Daejeon, South Korea

来源：

2019 ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS (EDAPS 2019) | 2019年

基金：

新加坡国家研究基金会;

关键词：

Active interposer; integrated voltage regulator; power distribution network; power noise suppression;

D O I：

10.1109/edaps47854.2019.9011662

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Insatiable increase of power consumption of high performance computing, various types of workloads, and lowering supply voltage require a stable and rapidly responding power supply. Integrated voltage regulators (IVR) are considered and studied as a promising solution for the fine grain power supply. In this paper, we introduce an IVR on active interposer for high performance 2.5D/3D ICs and analyze the proposed IVR by comparison with off-chip and on-chip voltage regulators (VRs). The efficiency, transient response and power noise suppression effects of each VR are evaluated. By optimal design of 2-stage VR, the IVR scheme shows higher efficiency. As closer distance from VR to load, improved transient response and power noise suppression can be achieved. In addition, due to the integration of voltage regulator circuit on active interposer, the effective footprint of module with the proposed IVR is the smallest.

引用

页数：3

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