VLSI implementation of a high-performance 32-bit RISC microprocessor

被引：0

作者：

Li, X ^{[1
]}

Ji, LW ^{[1
]}

Shen, B ^{[1
]}

Li, WH ^{[1
]}

Zhang, QL ^{[1
]}

机构：

[1] Fudan Univ, ASIC, Shanghai 200433, Peoples R China

来源：

2002 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS AND WEST SINO EXPOSITION PROCEEDINGS, VOLS 1-4 | 2002年

关键词：

RISC microprocessor; VLSI; pipeline; CPI; MIPS;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

The microprocessor is one of the most important blocks of the SoC. Considering high-performance, we implement a 32-bit RISC microprocessor, named as FDU32, with instruction sets compatible with ARM7TDMI. By using 5-stage pipeline and improving the circuit structure, FDU32 obtains 67% increment in max clock rate, 11% reduction in CPI and 86% increment in MIPS compared with ARM7TDMI at the same 0.35 mum CMOS process, and only the transistor count increases a little. FDU32 has passed the FPGA verification and taped out.

引用

页码：1458 / 1461

页数：4

共 50 条

[41] THE GMICRO/100 32-BIT MICROPROCESSOR
YOSHIDA, T
SHIMIZU, T
MIZUGAKI, S
HINATA, J
IEEE MICRO, 1991, 11 (04) : 20 - &
[42] PREPARING FOR THE IMPACT OF THE 32-BIT MICROPROCESSOR
ROBINSON, GM
DESIGN NEWS, 1985, 41 (09) : 75 - 80
[43] A high-performance CMOS 32-bit parallel CRC engine
Hobson, RF
Cheung, KL
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (02) : 233 - 235
[44] The architecture comparison and the VLSI implementation of the 32bit embedded RISC
Ke, X
Zhu, KJ
Li, QA
Hao, M
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2003, : 452 - 455
[45] A 32-BIT VLSI CPU CHIP
BEYERS, JW
DOHSE, LJ
FUCETOLA, JP
KOCHIS, RL
LOB, CG
TAYLOR, GL
ZELLER, ER
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1981, 16 (05) : 537 - 542
[46] 32-BIT MICROS - FROM RISC TO TRON
MYRVAAGNES, R
ELECTRONIC PRODUCTS MAGAZINE, 1988, 30 (21): : 47 - 50
[47] 32-BIT RISC MINIMIZES POWER, SIZE
不详
COMPUTER DESIGN, 1995, 34 (03): : 114 - 114
[48] 32-BIT RISC CONTROLLER TARGETS PDAS
CHILD, J
COMPUTER DESIGN, 1993, 32 (08): : 114 - 114
[49] A 32-BIT RISC ARCHITECTURE FOR EMBEDDED APPLICATIONS
WILSON, I
ELECTRONIC ENGINEERING, 1988, 60 (738): : 91 - &
[50] Verification of a 32-bit RISC processor core
Kasanko, T
Nurmi, J
2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS, 2004, : 107 - 110

← 1 2 3 4 5 →