Achieving programming model abstractions for reconfigurable computing

被引:36
作者
Andrews, David [1 ]
Sass, Ron [2 ]
Anderson, Erik [3 ]
Agron, Jason [4 ]
Peck, Wesley [4 ]
Stevens, Jim [4 ]
Baijot, Fabrice [4 ]
Komp, Ed [4 ]
机构
[1] Univ Kansas, Dept Elect Engn & Comp Sci, Lawrence, KS 66045 USA
[2] Univ N Carolina, Dept Elect & Comp Engn, Charlotte, NC 28223 USA
[3] Univ So Calif, Inst Informat Sci, Los Angeles, CA USA
[4] Univ Kansas, Informat & Telecommun Technol Ctr, Lawrence, KS 66045 USA
基金
美国国家科学基金会;
关键词
field-programmable gate arrays (FPGAs); operating systems; programming models; reconfigurable computing;
D O I
10.1109/TVLSI.2007.912106
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper introduces hthreads, a unifying programming model for specifying application threads running within a hybrid computer processing unit (CPU)/field-programmable gate-array (FPGA) system. Presently accepted hybrid CPU/FPGA computational models-and access to these computational models via high level languages-focus on programming language extensions to increase accessibility and portability. However, this paper argues that new high-level programming models built on common software abstractions better address these goals. The hthreads system, in general, is unique within the reconfigurable computing community as it includes operating system and middleware layer abstractions that extend across the CPU/FPGA boundary. This enables all platform components to be abstracted into a unified multiprocessor architecture platform. Application programmers can then express their computations using threads specified from a single POSIX threads (pthreads) multithreaded application program and can then compile the threads to either run on the CPU or synthesize them to run within an FPGA. To enable this seamless framework, we have created the hardware thread interface (HWTI) component to provide an abstract, platform-independent compilation target for hardware-resident computations. The HWTI enables the use of standard thread communication and synchronization operations across the software/hardware boundary. Key operating system primitives have been mapped into hardware to provide threads running in both hardware and software uniform access to a set of sub-microsecond, minimal-jitter services. Migrating the operating system into hardware removes the potential bottleneck of routing all system service requests through a central CPU.
引用
收藏
页码:34 / 44
页数:11
相关论文
共 23 条
  • [1] AGRON J, 2004, P 25 IEEE INT REAL T, P116
  • [2] Almasi G. S., 1994, Highly Parallel Computing
  • [3] Andresen D., 2005, Proceedings. 19th IEEE International Parallel and Distributed Processing Symposium
  • [4] [Anonymous], THESIS U CALIFORNIA
  • [5] PROCESSOR RECONFIGURATION THROUGH INSTRUCTION-SET METAMORPHOSIS
    ATHANAS, PM
    SILVERMAN, HF
    [J]. COMPUTER, 1993, 26 (03) : 11 - 18
  • [6] BROWNE JC, 1984, COMPUTER, V17, P83, DOI 10.1109/MC.1984.1659189
  • [7] The challenges of synthesizing hardware from C-like languages
    Edwards, Stephen A.
    [J]. IEEE DESIGN & TEST OF COMPUTERS, 2006, 23 (05): : 375 - 386
  • [8] SOME COMPUTER ORGANIZATIONS AND THEIR EFFECTIVENESS
    FLYNN, MJ
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1972, C 21 (09) : 948 - &
  • [9] GOKHALE M, 1994, P IEEE WORKSH FPGAS, P94
  • [10] SPARK: A high-level synthesis framework for applying parallelizing compiler transformations
    Gupta, S
    Dutt, N
    Gupta, R
    Nicolau, A
    [J]. 16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, : 461 - 466