A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique

A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5x5 to 15x15 in scale-invariant feature transform (SIFT) algorithm. A 108x96-pixel sensor was designed using a 0.18 mu m CMOS process in a 5 mmx5 mm chip. By simulating the sensor at 100 MHz, the image filtering times for 5x5, 7x7, and 9x9 Gaussian kernels in the SIFT algorithm are 34 mu s, 49 mu s, and 83 mu s, respectively. Such a high processing speed is very important for achieving the real-time performance when filtering high resolution images with large kernels.