HIE-Block Latency Insertion Method for Fast Transient Simulation of Nonuniform Multiconductor Transmission Lines

被引：0

作者：

Takasaki, Takahiro ^{[1
]}

Sekine, Tadatoshi ^{[2
]}

Asai, Hideki ^{[3
]}

机构：

[1] Shizuoka Univ, Grad Sch Eng, Dept Syst Eng, Naka Ku, Hamamatsu, Shizuoka 4328561, Japan

[2] Shizuoka Univ, Dept Mech Eng, Naka Ku, Hamamatsu, Shizuoka 4328561, Japan

[3] Shizuoka Univ, Elect Res Inst, Nanovis Res Div, Hamamatsu, Shizuoka 4328561, Japan

来源：

2014 19TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) | 2014年

关键词：

COMPUTATIONAL ELECTROMAGNETICS CEM; SELECTIVE VALIDATION FSV; FDTD SCHEME; LIM;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes a hybrid implicit-explicit block latency insertion method (HIE-block-LIM) for fast simulation of nonuniform multiconductor transmission lines. In the HIE-block-LIM, an implicit difference method is used with respect to the current variables in one direction, and an explicit method is adopted to update the other variables. The HIE-block-LIM can alleviate a time step size limitation of the existing block-LIM by taking both advantages of the explicit and implicit difference methods.

引用

页码：774 / 779

页数：6

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