Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore

被引：12

作者：

Ungerer, Theo ^{[1
]}

Bradatsch, Christian ^{[1
]}

Frieb, Martin ^{[1
]}

Kluge, Florian ^{[1
]}

Mische, Joerg ^{[1
]}

Stegmeier, Alexander ^{[1
]}

Jahr, Ralf ^{[1
]}

Gerdes, Mike ^{[2
,11
]}

Zaykov, Pavel ^{[3
]}

Matusova, Lucie ^{[3
]}

Li, Zai Jian Jia ^{[3
]}

Petrov, Zlatko ^{[4
]}

Boeddeker, Bert ^{[5
]}

Kehr, Sebastian ^{[5
]}

Regler, Hans ^{[6
]}

Hugl, Andreas ^{[6
]}

Rochange, Christine ^{[7
]}

Ozaktas, Haluk ^{[7
]}

Casse, Hugues ^{[7
]}

Bonenfant, Armelle ^{[7
]}

Sainrat, Pascal ^{[7
]}

Lay, Nick ^{[8
]}

George, David ^{[8
]}

Broster, Ian ^{[8
]}

Quinones, Eduardo ^{[9
]}

Panic, Milos ^{[9
,12
]}

Abella, Jaume ^{[9
]}

Hernandez, Carles ^{[9
]}

Cazorla, Francisco ^{[9
,13
]}

Uhrig, Sascha ^{[10
]}

Rohde, Mathias ^{[10
]}

Pyka, Arthur ^{[10
]}

机构：

[1] Univ Augsburg, Dept Comp Sci, D-86159 Augsburg, Germany

[2] Univ Augsburg, Augsburg, Germany

[3] Honeywell Int Sro, Turanka 100, Brno 62700, Czech Republic

[4] Honeywell EOOD, Sofia 1000, Bulgaria

[5] DENSO AUTOMOT Deutschland GmbH, Freisinger Str 21, D-85386 Eching, Germany

[6] BAUER Maschinen GmbH, Bauer Str 1, D-86522 Schrobenhausen, Germany

[7] Univ Toulouse 3, Route Narbonne 118, F-31062 Toulouse, France

[8] Rapita Syst Ltd, Atlas House,Link Business Pk,Osbaldwick Link Rd, York YO10 3JB, N Yorkshire, England

[9] Barcelona Supercomp Ctr, Calle Jordi Girona 31, Barcelona 08034, Spain

[10] Tech Univ Dortmund, August Schmitt Str 4, D-44227 Dortmund, Germany

[11] Autoliv BV & Co KG, Theodor Heuss Str 2, D-85221 Dachau, Germany

[12] Tech Univ Catalunya, Calle Jordi Girona 31, Barcelona 08034, Spain

[13] Spanish Natl Res Council, Calle Jordi Girona 31, Barcelona 08034, Spain

来源：

ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | 2016年 / 15卷 / 03期

关键词：

Hard real-time; timing-predictable multicore; parallelisation; timing-analyzable; WCET analysis; real-time system architecture; EXECUTION;

D O I：

10.1145/2910589

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The EC project parMERASA (Multicore Execution of Parallelized Hard Real-Time Applications Supporting Analyzability) investigated timing-analyzable parallel hard real-time applications running on a predictable multicore processor. A pattern-supported parallelization approach was developed to ease sequential to parallel program transformation based on parallel design patterns that are timing analyzable. The parallelization approach was applied to parallelize the following industrial hard real-time programs: 3D path planning and stereo navigation algorithms (Honeywell International s.r.o.), control algorithm for a dynamic compaction machine (BAUER Maschinen GmbH), and a diesel engine management system (DENSO AUTOMOTIVE Deutschland GmbH). This article focuses on the parallelization approach, experiences during parallelization with the applications, and quantitative results reached by simulation, by static WCET analysis with the OTAWA tool, and by measurement-based WCET analysis with the RapiTime tool.

引用

页数：27

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