VLSI Architecture Design and Implementation of a LDPC Encoder for the IEEE 802.22 WRAN Standard

被引:0
|
作者
Ferreira Neto, Nelson Alves [1 ,2 ]
de Oliveira, Joaquim Ranyere S. [1 ,2 ]
de Oliveira, Wagner Luiz A. [1 ]
Bittencourt, Joao Carlos N. [1 ]
机构
[1] Univ Fed Bahia, Salvador, BA, Brazil
[2] Lab Sistemas Integraveis & Tecnol, Salvador, BA, Brazil
关键词
LDPC; encoder; channel coding; 802.22; WRAN; EFFICIENT;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper presents two architectures for the Low Density Parity Check (LDPC) encoder, the first one based on a fully serial approach and the second one in a mixed way, as well as their respective realizations in ASIC. The proposed designs are capable of operating in 84 combinations of code rate and word size, according to the IEEE 802.22 Wireless Regional Area Network (WRAN) standard, aiming low power and small area. Although the proposed architectures are primarily designed for the mentioned standard, they can be easily adapted to other wireless broadband standards.
引用
收藏
页码:71 / 76
页数:6
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